cpulib: Add ISBs or comment why they are unneeded

Change-Id: I18a41bb9fedda635c3c002a7f112578808410ef6
Signed-off-by: Dimitris Papastamos <[email protected]>

diff --git a/lib/cpus/aarch64/cortex_a57.S b/lib/cpus/aarch64/cortex_a57.S
index 07fadd154d0429ce828486ff028eb2b19c7e2f57..8e60445516275c284631b7b4a580da62fa1e9f4f 100644 (file)
--- a/lib/cpus/aarch64/cortex_a57.S
+++ b/lib/cpus/aarch64/cortex_a57.S
@@ -404,6 +404,7 @@ func cortex_a57_reset_func
 #if IMAGE_BL31 && WORKAROUND_CVE_2017_5715
        adr     x0, wa_cve_2017_5715_mmu_vbar
        msr     vbar_el3, x0
+       /* isb will be performed before returning from this function */
 #endif
 
 #if WORKAROUND_CVE_2018_3639

diff --git a/lib/cpus/aarch64/cortex_a72.S b/lib/cpus/aarch64/cortex_a72.S
index bb9381d17ecbc0ae9f4fd4e6bbaddbdd204cc13c..38b76b940c2e7d1fef72fcdb9014332a14852b1e 100644 (file)
--- a/lib/cpus/aarch64/cortex_a72.S
+++ b/lib/cpus/aarch64/cortex_a72.S
@@ -137,6 +137,7 @@ func cortex_a72_reset_func
        cpu_check_csv2  x0, 1f
        adr     x0, wa_cve_2017_5715_mmu_vbar
        msr     vbar_el3, x0
+       /* isb will be performed before returning from this function */
 1:
 #endif
 

diff --git a/lib/cpus/aarch64/cortex_a73.S b/lib/cpus/aarch64/cortex_a73.S
index d595f128fa8a036497aa88a12ab2201ec6c7660b..b796561359ed9094e619d4acda5fe9a1c7f7d83c 100644 (file)
--- a/lib/cpus/aarch64/cortex_a73.S
+++ b/lib/cpus/aarch64/cortex_a73.S
@@ -40,6 +40,7 @@ func cortex_a73_reset_func
        cpu_check_csv2  x0, 1f
        adr     x0, wa_cve_2017_5715_bpiall_vbar
        msr     vbar_el3, x0
+       /* isb will be performed before returning from this function */
 1:
 #endif
 

diff --git a/lib/cpus/aarch64/cortex_a75.S b/lib/cpus/aarch64/cortex_a75.S
index 20ec32ce2c2ee2276839c0dd89ddecc2d3909277..73f566f4b36b700339e6774e6b520ada36f1e3f8 100644 (file)
--- a/lib/cpus/aarch64/cortex_a75.S
+++ b/lib/cpus/aarch64/cortex_a75.S
@@ -15,6 +15,7 @@ func cortex_a75_reset_func
        cpu_check_csv2  x0, 1f
        adr     x0, wa_cve_2017_5715_bpiall_vbar
        msr     vbar_el3, x0
+       isb
 1:
 #endif